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Kc89c72 Datasheet Jun 2026

| Part Number | Flash Size | RAM | Timers | I²C/SPI | Unique Feature | | :--- | :--- | :--- | :--- | :--- | :--- | | AT89C52 | 8 KB | 256B | 3 | No | Classic 8051 | | AT89C55WD | 20 KB | 256B | 3 | No | Increased flash | | | 72 KB | 256B | 3 | Yes | Bank-switched flash | | STC89C58RD | 32 KB | 1.2KB | 3 | Yes | Extra internal RAM |

The most unique aspect of the Kc89c72 is its . Standard 8051 cores have a 16-bit program counter, limiting direct addressing to 64KB. To accommodate 72KB, the Kc89c72 uses a bank switching scheme: Kc89c72 Datasheet

typically comes in a package. Its bus interface is designed to be compatible with most 8-bit microprocessors of the era (e.g., Z80, 6502). Pin Category Description Data Bus (D0-D7) 8-bit bidirectional bus for data and address transfer. Address/Control | Part Number | Flash Size | RAM

Per the “Revision History” section of the Kc89c72 datasheet, engineers should note: Its bus interface is designed to be compatible

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